On Self-Diagnostics of Digital Devices Using Methods for Monitoring Pulse Sequences
Abstract Generated abstract
This paper examines continuous self-diagnostics of digital devices by monitoring the correctness of selected pulse sequences that represent device states during operation. It argues that checking key states can provide practical fault detection and localization, and describes improved monitoring circuits that divide pulses into two or three groups to detect lost pulses, simultaneous pulses from different groups, and some multiple faults with increased noise immunity and efficiency. The method is reported as the basis for built-in monitoring of a digital information system using about 1500 integrated NAND elements, where the added monitoring hardware was about 20 percent of the main equipment and enabled rapid localization to a replaceable unit.
Full Text
ON SELF-DIAGNOSTICS OF DIGITAL DEVICES BY THE METHOD OF MONITORING A SEQUENCE OF PULSES
P. P. BAIDA
(Presented by the scientific seminar of the Department of Computer Engineering)
Most of the widespread methods of hardware and software monitoring are, to a greater or lesser degree, characterized by such shortcomings in organizing end-to-end monitoring of complex digital devices (DD) as the high cost of monitoring, the long time required to localize faults, and incomplete monitoring of devices.
The method of monitoring a sequence of pulses, proposed in [1] for periodic self-checking (of DD) and considered in [2] as the principal method for periodic testing of digital computers, is free of the indicated shortcomings; however, it has not yet found proper application in engineering practice.
The present paper considers questions of improving the method of monitoring a sequence of pulses and its use for continuous self-diagnostics of digital devices carried out during operation of the object.
The essence of the method set forth is that, in the process of self-checking a DD, the correctness of the succession of its states, represented for monitoring in the form of nonoverlapping pulses, is verified. Upon any deviation of the current sequence of pulses from the reference one, operation of the object is stopped, and as a result of analyzing the stopping point in the sequence of states, the cause of the fault is established.
In the mode of periodic testing of the object, the monitoring system forces the device to perform a specified sequence of operations upon the signal “enable self-checking,” which may be issued manually or automatically according to a specified program. With such an organization of monitoring, random failures arising during execution of the working algorithm are not detected.
In the mode of continuous testing of the object, the monitoring system keeps track of the correctness of the succession of states of the device during its operation according to the main program and generates an error signal when both faults and failures appear.
With a probability of detection and accuracy of fault localization sufficient for practice, it is possible to verify the correctness of the succession not of all states, but of the most characteristic (key) states. However, the problem of choosing the sequence of states that is best for monitoring is very complex, and it is expedient to solve it using digital simulation [3].
In many cases it is expedient to divide the monitored pulse sequence \(C=\{c_1,c_k\}\) into two groups:
odd
\[ C_{\mathrm{o}}=c_1 \vee c_3 \vee \ldots \vee c_{2n-1} \]
and even
\[ C_{\mathrm{e}}=c_2 \vee c_4 \vee \ldots \vee c_{2n}, \]
where
\[ 2n \leq k. \]
The functional diagram of the corresponding device for monitoring a pulse sequence, possessing increased noise immunity in comparison with those described in [1, 2], is given in Fig. 1 [4]. It contains multi-input OR circuits 1 and 2 for assembling the even \(C_{\mathrm{e}}\) and odd \(C_{\mathrm{o}}\) monitored pulses, respectively, OR circuit 3, a flip-flop with a counting input 4, delay elements 5 and 6 for the duration of transients in the flip-flop and OR circuit 3, and a comparison circuit 7, which produces the error signal \(y\) according to the formula:
\[ y=\overline{T} C_{3\mathrm{o}} \vee T_{3\mathrm{e}}, \]
where \(C_{3\mathrm{o}}\) is the delayed signal \(C_{\mathrm{o}}\),
\(C_{3\mathrm{e}}\) is the delayed signal \(C_{\mathrm{e}}\).
Under normal alternation of the monitored pulses, the signals \(C_{\mathrm{o}}\) set flip-flop 4 to state 1, while the signals \(C_{\mathrm{e}}\) reset it to state 0. In this case no error signal arises. If any pulse drops out of the monitored sequence, the alternation of the pulses \(C_{\mathrm{o}}\) and \(C_{\mathrm{e}}\) is disturbed, and an error signal appears at the output of the comparison circuit.
The device considered makes it possible to detect the loss of any odd number of consecutive pulses, as well as the simultaneous occurrence of two or more pulses belonging to different parity groups.
In some specific cases it proves more expedient to divide the total number of monitored pulses not into two but into three groups. Moreover, the corresponding analysis showed that dividing the monitored pulses into more than three groups leads to a sharp increase in the volume of monitoring equipment and to a reduction in monitoring efficiency.
Fig. 1. Functional diagram of a device for monitoring a pulse sequence using the principle of dividing pulses into two groups.
For monitoring a pulse sequence whose number is a multiple of three, it is useful to use the circuit shown in Fig. 2 [5].
This device contains multi-input OR circuits 1–3 for assembling the monitored pulses, flip-flops with separate inputs
4–6, information-transfer gates between flip-flops 7–9, and comparison circuit 10. Flip-flops 4–6 and gates 7–9 form a three-stage ring shift register (TRR).
At the outputs of OR circuits 1–3, reset signals for the monitored pulses \(c_3—c_1\) are formed; these are applied to the strobe inputs of gates 7–9, respectively.
Fig. 2. Functional diagram of a device for monitoring a pulse sequence, using the principle of dividing the pulses into three groups
the gates 7–9, respectively. Gates 7–9 serve to transfer information between flip-flops 4–6. The one and zero outputs of flip-flops 4–6 are connected to the inputs of comparison circuit 10.
Table
| Pulses | State of flip-flops at time \(t\): 4 | State of flip-flops at time \(t\): 5 | State of flip-flops at time \(t\): 6 | State of flip-flops at time \(t+1\): 4 | State of flip-flops at time \(t+1\): 5 | State of flip-flops at time \(t+1\): 6 |
|---|---|---|---|---|---|---|
| \(c_1\) | 0 | 1 | 0 | 0 | 1 | 1 |
| \(c_2\) | 0 | 1 | 1 | 0 | 0 | 1 |
| \(c_3\) | 0 | 0 | 1 | 1 | 0 | 1 |
| \(c_4\) | 1 | 0 | 1 | 1 | 0 | 0 |
| \(c_5\) | 1 | 0 | 0 | 1 | 1 | 0 |
| \(c_6\) | 1 | 1 | 0 | 0 | 1 | 0 |
| \(c_7\) | 0 | 1 | 0 | 0 | 1 | 1 |
In the initial state, the TKR flip-flops 4, 5, 6 are in states 0, 1, 0, respectively. Under normal alternation of the monitored pulses, the states of flip-flops 4–6 change in accordance with the table.
No error signal arises in this case. If any pulse is lost from the monitored sequence, or if two pulses belonging to different groups appear simultaneously, flip-flops 4–6 are set to identical states (0 or 1), and comparison circuit 10 generates the error signal
\[ y = T_4 T_5 T_6 \vee \overline{T}_4 \overline{T}_5 \overline{T}_6 . \]
The proposed device also makes it possible, in some cases, to detect the simultaneous appearance of three or more pulses with a delay of several clock periods, and it has increased monitoring efficiency in comparison with known devices owing to the detection of multiple faults.
The method considered was used as the basic one in organizing end-to-end continuous monitoring of the operability of a digital information system containing about 1500 integrated NAND logic elements. The volume of the monitoring equipment amounted to approximately 20% of the volume of the main equipment. The developed built-in monitoring hardware also makes it possible to perform rapid localization of faults in the system with accuracy down to a replaceable unit. Tests of the system showed the high efficiency of the self-monitoring method described. It is most expedient to use the proposed circuit solutions for constructing such devices with self-diagnostics during operation as synchronizing-pulse generators, pulse distributors, local control units, program units, and control units of specialized and general-purpose digital computers.
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