Determination of the Efficiency and Reliability of Hardware Control in the Simulation of Digital Devices on Electronic Digital Computers

N. P. Baida
Submitted 1976 | SovietRxiv: ru-197601.13148 | Translated from Russian

Abstract Generated abstract

The paper presents a procedure for quantitatively evaluating the effectiveness and reliability of hardware control in digital devices when studied through full-scale tests or digital simulation. Building on previously derived reliability formulas, it specifies the statistical characteristics needed to estimate error detection or correction in the main circuit, self-monitoring performance in the control circuit, simultaneous errors in both circuits, and the probability of false or absent error signaling. The method aggregates results by error multiplicity, with practical restriction to low multiplicities under a Poisson error-flow assumption, and substitutes these estimates into criteria for overall control effectiveness and the reliability of positive and negative control results. The approach is indicated as applicable to alternative hardware-control circuit variants and is illustrated by reference to modeling a decoder on an M-220 computer.

Full Text

DETERMINING THE EFFECTIVENESS AND RELIABILITY OF HARDWARE CONTROL IN THE MODELING OF DIGITAL DEVICES ON AN ELECTRONIC DIGITAL COMPUTER

N. P. Baida

(Presented by the scientific seminar of the Department of Computing Technology)

In [1] the following formulas were obtained for calculating the effectiveness and reliability of hardware control (HC) of digital devices (DD):

\[ \mathcal{E}=P(\overline{B})\cdot \mathcal{E}_{m}+P(B)\cdot P(C/AB), \tag{1} \]

\[ D_{0}= \frac{P(\overline{A})\cdot P(\overline{C}/\overline{A})} {P(\overline{A})\cdot P(\overline{C}/\overline{A})+P(A)-P(A)\cdot \mathcal{E}}, \tag{2} \]

\[ D_{1}= \frac{P(A)\cdot \mathcal{E}} {P(A)\cdot \mathcal{E}+P(\overline{A})-P(\overline{A})\cdot P(\overline{C}/\overline{A})}, \tag{3} \]

where \(\mathcal{E}\) is the probability of detecting (correcting) errors that have appeared in the main circuit (MC);

\(P(\overline{B})\) is the probability that no errors appear in the control circuit (CC);

\(\mathcal{E}_{m}\) is the probability of detecting (correcting) an error that has appeared in the MC, if the CC is serviceable;

\(P(B)\) is the probability of the appearance of errors in the CC;

\(P(C/AB)\) is the probability of detecting (correcting) errors that have appeared simultaneously in the MC and CC;

\(P(A)\) and \(P(\overline{A})\) are, respectively, the probabilities of the appearance (nonappearance) of errors in the MC;

\(P(\overline{C}/\overline{A})\) is the probability that no error signal appears at the output of the CC, if there are no errors in the MC;

\(D_{0}\) is the reliability of a negative control result (the probability of absence of faults in the MC, if there is no error signal at the output of the CC);

\(D_{1}\) is the reliability of a positive control result (the probability of the presence of faults in the MC, if there is an error signal at the output of the CC).

When determining the quantitative values of the criteria \(\mathcal{E}\) and \(D_{0}\), the quantities \(P(B)\), \(P(A)\), \(P(\overline{B})\), and \(P(\overline{A})\) must be specified in the form of certain constants, on the basis of a statistical analysis of data on the operation of analogous equipment or guided by information on the assumed intensity of failures and malfunctions of the elements of the principal circuit.

For a statistical determination of the quantitative indicators of the criteria \(\mathcal{E}\), \(D_0\), and \(D_1\) from data of full-scale tests of the system or by means of digital simulation, it is necessary first to compute the following characteristics:

  1. The effectiveness of the monitoring method in detecting (correcting) errors of multiplicity \(j\):

\[ \mathcal{E}_{\mathrm{m}j}=\frac{S_{0j}}{N_{0j}}, \tag{5} \]

where \(S_{0j}\) is the number of different errors of multiplicity \(j\) in the OS that are detected (corrected) by monitoring, if the CK is operational;
\(N_{0j}\) is the number of all possible different errors of multiplicity \(j\) in the OS.

2.

\[ \mathcal{E}_{\mathrm{m}}= \frac{\displaystyle\sum_{j=1}^{n} P_{0j}\cdot \mathcal{E}_{\mathrm{m}j}} {\displaystyle\sum_{j=1}^{n} P_{0j}}, \tag{6} \]

where \(P_{0j}\) is the probability of occurrence in the OS of errors of multiplicity \(j\). In practice one may restrict oneself to \(n=3\), since for a Poisson flow of errors \(P_{0n}\approx 0\) for \(n>3\).

  1. The effectiveness of self-monitoring [1] in detecting (correcting) errors of multiplicity \(j\):

\[ \mathcal{E}_{\mathrm{sam}j}=\frac{S_{kj}}{N_{kj}}, \tag{7} \]

where \(S_{kj}\) is the number of different errors of multiplicity \(j\) in the CK that are detected (corrected) by monitoring, if the OS is operational;
\(N_{kj}\) is the number of all possible different errors of multiplicity \(j\) in the CK.

4.

\[ \mathcal{E}_{\mathrm{sam}}= \frac{\displaystyle\sum_{j=1}^{n} P_{kj}\cdot \mathcal{E}_{\mathrm{sam}j}} {\displaystyle\sum_{j=1}^{n} P_{kj}}, \tag{8} \]

where \(P_{kj}\) is the probability of occurrence in the CK of errors of multiplicity \(j\). By analogy with (6), one may restrict oneself to \(n=3\).

  1. The probability of detecting (correcting) multiple errors of multiplicity \(j\) arising simultaneously in the OS and the CK:

\[ P(C/AB)_j=\frac{S_{okj}}{N_{okj}}, \tag{9} \]

where \(S_{okj}\) and \(N_{okj}\) are determined with respect to the system analogously to (5) and (7), with \(j>1\).

6.

\[ P(C/AB)= \frac{\displaystyle\sum_{j=1}^{n} P_{okj}\cdot P(C/AB)_j} {\displaystyle\sum_{j=1}^{n} P_{okj}}, \tag{10} \]

where \(P_{okj}\) is the probability of occurrence of errors of multiplicity \(j\) arising simultaneously in the OS and the CK. By analogy with (6), one may restrict oneself to \(n=3\).

7.

\[ P(\overline{C}/\overline{A})=P(\overline{B})+P(B)(1-\mathcal{E}_{\mathrm{sam}}^{*}), \tag{11} \]

where \(E_{\mathrm{sam}}^{*}=E_{\mathrm{sam}}\cdot K_c\);

and \(K_c\) is a coefficient indicating what percentage of errors in the SC causes the appearance of the “system failure” signal [1].

Then, substituting (4–11) into (1–3), one can determine \(E\), \(D_0\), and \(D_1\) for the \(j\)-th variant of the hardware-control circuit of a particular digital device. For example, in [2], using the proposed method, the quantitative values of the criteria \(E\), \(D_0\), and \(D_1\) were calculated for a decoder with HC by modeling its schematic circuit on an M-220 computer.

REFERENCES

  1. N. P. Baida, Effectiveness and reliability of hardware control of digital devices. Izvestiya TPI (in press).

  2. N. P. Baida, V. I. Nalezhko, A. D. Cheredov, Modeling of a decoder with hardware control on a universal computer. Present collection.

Submission history

Determination of the Efficiency and Reliability of Hardware Control in the Simulation of Digital Devices on Electronic Digital Computers